Markets for On-Chip and Chip-to-Chip Optical Interconnects - 2015 to 2024


The so-called “interconnect bottleneck is creating opportunities for optical device and cable makers or all kinds. Process scaling, power consumption and operating frequency have all need to move away from metal interconnects and into the optical realm.  This need is increasing with each new node; in high performance processors with metal tracks, clock distribution alone can use up to 50% of total chip power.

In this report, CIR analyzes both the latest commercial developments in optical interconnection at the chip level (both on-chip and chip-to-chip) and the progress in this area that is being made by important research teams worldwide.  The coverage includes an investigation into the very latest architectures, devices, and materials that are impacting the prospects for on-chip and chip-to-chip optical connection.  Among the topics covered by the report are the following:

• The rise of optical engines and how these fit into future chip-to-chip connectivity.  How will the architectures of these devices and materials used change as device dimensions shrink and what is the revenue potential of optical engines over the next ten years

• An assessment of how novel photonic devices will be used in on-chip/chip-to-chip connections, analyzing the market potential of compound semiconductors versus the silicon photonics approach. 

• The market for approaches to optical interconnection that uses novel materials.  Polymers, a material that has a long history, may finally find a role.  Possible roadmaps for optical interconnection that use carbon nanotubes are also considered.

• The commercialization of CMOS compatible optical interconnection using 3D architectures and other solutions 
This report also contains a 10-year analysis that quantifies where and when the commercial opportunities for optical interconnection at the chip level will emerge and how much they will be worth. We also profile the leading firms and research efforts involved in designing and implementing on-chip and chip-to-chip optical interconnection.

CIR has been tracking the market for optical interconnects for almost a decade and is the leading industry analyst firm providing coverage in this this area.  The report will be of considerable interest to marketing managers, business development executives and product managers in the semiconductor and data communications industries.  It will also be of use to serious investors in these and other related industries.

Table of Contents


Executive Summary
E.1 Important Developments in On-Chip/Chip-to-Chip Interconnection in 2014
E.2 Why the "Interconnect Bottleneck" Creates Opportunities for the Photonics Industry
E.2.1 The Device Opportunity:  Small and Cheap
E.2.2 The Integration Dimension:  How Do You Get an Optical Link on a Chip and Make Money?
E.2.3 An Opportunity Analysis Matrix for Chip-Level Optical Interconnection
E.3 Current and Future Challenges for Chip-Level Optical Interconnection
E.3.1 Danger of Overshooting the Market
E.3.2 Technological Risks:  Current and Future
E.4 Summary of 10-year Market Forecasts for Chip-Level Interconnection
E.5 Eight Companies to Watch in the On-Chip/Chip-to-Chip Business
Chapter One: Introduction
1.1 Background to this Report
1.1.1 Markets for Chip-Related Optical Interconnection:  Players, Products and Opportunities
1.1.2 Optical Engines and Backplanes:  Immediate Revenues from Optical Interconnect?
1.1.3 Emerging Technologies for Chip-Based Optical Interconnection: Long-Term Opportunities
1.2 Objectives of this Report
1.3 Methodology and Information Sources for this Report
Chapter Two: Analysis of Demand for On-Chip/Chip-to-Chip Interconnection        
2.1 Moore's Law, Scaling and Interconnect
2.1.1 Current Prognosis for Moore's Law
2.2.2 Moore's Law and the Limits of Copper Interconnect
2.2 Content Drivers for Optical Interconnect at the Chip Level
2.2.1 The Next Data Rate Surge:  What it Means for Processors and Memories
2 3 Limits to Electronic Interconnects and Strategies for Dealing with them
2.4 Market Threats to Optical Interconnect
2.5 A Possible Transition to Optical Computing and Communications:  Interconnect Implications
2.5.1 All-Optical Backplanes
2.5.2 Optical Crossconnects
2.5.3 Optical Computing
2.6 Key Points Made in this Chapter

Chapter Three: Technologies for On-Chip/Chip-to-Chip Interconnect
3.1 Chip-Level Optical Interconnect Technology
3.1.1 Chip-to-Chip and On-Chip Interconnect:  Replacing Copper
3.1.2 Chip-to-Chip and Module-to-Module PCBs
3.1.3 On-Chip Interconnect
3.1.4 Future Technologies for Chip-Level Interconnect
3.2 Multicore Processing and Interconnect
3.2.1 Opportunities for Optical Interconnection in Multicore Processors
3.2.2 3D Chips, 2.5D Chips and Optical Interconnect
3.3 VCSELs for Interconnect:  Getting Faster
3.4 Implications of Novel Laser R&D for Optical Interconnection
3.4.1 Silicon Lasers
3.4.2 Quantum Dot Lasers
3.5 Other Components Suitable for the Optical Interconnect Market
3.5.1 Micro-modulators
3.5.2 Detectors
3.5.3 Lenses
3.6 Optical Engines
3.6.1 Optical Engine Technology
3.6.2 Optical Engine Suppliers
3.7 Nanocarbon as an Alternative to Optical Interconnect
3.8 Key Points Made in this Chapter

Chapter Four:  Chip Level Optical Interconnection, Technology Platforms and Ten-Year Market Forecasts
4.1 Forecasting Methodology and Forecasting Assumptions
4.2 The Role of Optical Integration Platforms in Future Chip-Based Interconnection
4.2.1 Monolithic versus Hybrid Integration
4.2.2 Integration, Interconnect and InP
4.2.3 10-Year Forecast of Chip-Level Optical Interconnect Using PICs
4.3 Silicon Photonics
4.3.1 Silicon Photonics and On-Chip Photonic Interconnects
4.3.2 10-Year Forecast of Chip-Level Optical Interconnect Using Silicon Photonics
4.4 Opportunities for Fiber, Waveguides and Free-Space Optics in Chip-Level Interconnect
4.4.1 Fiber and Interconnection
4.4.2 The Role of Polymer (and Other) Waveguides in Chip-Based Interconnection
4.4.3 The Role of Free-Space Optics in Chip-Level Interconnection
4.4.4 10-Year Forecast of Fiber, Waveguides, and Free-Space Optics for Chip-Level Interconnect
4.5 Key Points Made in this Chapter

Acronyms and Abbreviations Used in this Report
About the Author

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