Reports


Revenue Opportunities for Optical Interconnects:Market and Technology Forecast - 2013 to 2020 Vol II

Description

The traditional architectural and material assumptions with regard to how integrated circuits are fabricated have been challenged in recent years and the semiconductor industry is looking for new solutions. Power and thermal issues add to this apparent crisis in the semiconductor industry.

One of the most important problems is the so-called “interconnect bottleneck,” that is the tendency for data traffic jams to appear both on-chip and chip-to-chip. The interconnect bottleneck is emerging well before Moore’s Law completely runs out of steam, but reappears in differing forms in some of the new architectures designed to make chip scaling easier.

The “obvious” solution is to deploy fiber optics; which is usually the way to go whenever and wherever there is a bandwidth problem. But fiber optic solutions to on-chip and chip-to-chip interconnection is something that will be hard to develop for commercial chip products. Producing photonic devices that are small enough and inexpensive enough to be used at the chip level is an immensely difficult requirement.

In this report, we analyze the latest developments in optical interconnection at the chip level and the progress in this area that is being made by important research teams throughout the world. Both R&D and commercial development are discussed.

The report looks at this issue from the perspective of classic CPU chips as well as the latest architectures, and the opportunities for optical interconnection are compared to a possible future for metal interconnects and interconnect alternatives that are even more exotic than photonics; carbon nanotubes, especially.

The report also contains a 10-year roadmap that explains where and when the commercial opportunities for optical interconnection at the chip level will emerge and how much they will be worth. We also profile the leading firms and research efforts involved in designing and implementing on-chip and chip-to-chip optical interconnection.

Table of Contents

Executive Summary 
E.1 "Interconnect Bottleneck" Spells Opportunities for the Photonics Industry
E.1.1 The Device Opportunity:  Small and Cheap
E.1.2 The Integration Dimension:  How Do You Get an Optical Link on a Chip?
E.1.3 An Opportunity Analysis Matrix for Chip-Level Optical Interconnection
E.2 Challenges for Chip-Level Optical Interconnection
E.2.1 Danger of Overshooting the Market
E.2.2 Technological Risks
E.3 Roadmap Considerations and Summary 10-year Forecast for Chip Level Interconnection
E.4 Two Companies to Watch:  IBM and Intel
E.4.1 IBM
E.4.2 Intel
 
Chapter One: Introduction 
1.1 Background to this Report
1.1.1 Character of Chip-Related Optical Interconnection:  Players, Products and Opportunities
1.1.2 Optical Engines and Optical Backplanes:  Prospects for Immediate Revenues?
1.1.3 Deeper: Future Enabling Technologies for Chip-Based Optical Interconnection
1.2 Objectives of this Report
1.3 Methodology and Information Sources for this Report
 
Chapter Two: Analysis of Demand for On-Chip/Chip-to-Chip Interconnection         
2.1 Megatrends Driving the Need for Optical Interconnect at All Levels
2.1.1 The Next Data Rate Surge:  Coming Soon to a Data Center Near You
2.1.2 Interconnection's Coming Big Data Boom
2.2 Chip-to-Chip and On-Chip Interconnect:  Replacing Copper
2.2.1 Chip-to-Chip and Module-to-Module PCBs
2.2.2 On-Chip Interconnect
2.3 Limits to Electronic Interconnects
2.3.1 Strategies for Dealing with the Limits of Electrical Interconnect
2.3.2 Materials Strategies for Future Metal Interconnect
2.4 Drivers and Threats for Optical Interconnect
2.4.1 Advantages of Optical Interconnects
2.4.2 The Growing Size of the Addressable Market for Optical Interconnect
2.4.3 Market Threats to Optical Interconnect
2.5 Moore's Law, Scaling and Interconnect
2.5.1 Current Prognosis for Moore's Law
2.5.2 Moore's Law and Copper Interconnect
2.6 Multicore Processing and Interconnect
2.6.1 Opportunities for Optical Interconnection in Multicore Processors
2.7 3D Chips and Interconnect
2.7.1 3D Chips and 2.5D Chips
2.7.2 Opportunities for Optical Interconnection in 3D Processors
2.8 A Possible Transition to Optical Computing and Communications:  Interconnect Implications
2.8.1 All-Optical Backplanes
2.8.2 Optical Crossconnects
2.8.3 Optical Computing
2.9 Potential for Moving to Nanocarbon Computers
2.10 Key Points Made in this Chapter
 
Chapter Three: Technologies for On-Chip/Chip-to-Chip Interconnect
3.1 Future Technologies for Chip-Level Interconnect
3.2 VCSELs for Interconnect:  Getting Faster
3.2.1 Evolution of VCSEL Technology
3.3 Silicon Lasers
3.3.1 Intel, Lasers and Silicon Photonics
3.3.2 Skorpios
3.4 Quantum Dot Lasers
3.4.1 Firms Supplying QD Lasers for Optical Interconnection
3.5 Optical Engines
3.5.1 Optical Engine Technology
3.5.2 Optical Engine Suppliers
3.5.3 Eight-Year Forecast of Chip-Level Optical Interconnect Using Optical Engines
3.6 The Role of Optical Integration in Future Chip-Based Interconnection
3.6.1 Monolithic versus Hybrid Integration
3.6.2 Integration, Interconnect and InP
3.6.3 Eight-Year Forecast of Chip-Level Optical Interconnect Using PICs
3.7 Silicon Photonics
3.7.1 Silicon Photonics and On-Chip Photonic Interconnects
3.7.2 Eight-Year Forecast of Chip-Level Optical Interconnect Using Silicon Photonics
3.7.3 IBM and Silicon Photonics
3.8 Opportunities for Fiber, Waveguides and Free-Space Optics in Chip-Level Interconnect
3.8.1 Fiber and Interconnection
3.8.2 The Role of Polymer (and Other) Waveguides in Chip-Based Interconnection
3.8.3 The Role of Free-Space Optics in Chip-Based Interconnection
3.8.4 Eight-Year Forecast of Fiber, Wave Guides, and Free-Space Optics for Chip-Level Interconnect
3.9 Use of Carbon Nanotubes and Graphene for Chip-Level Optical Interconnect
3.10 Key Points Made in this Chapter
 
Acronyms and Abbreviations Used in this Report
About the Author
 
List of Exhibits
Exhibit E-1: Opportunity Analysis Matrix for Chip-Level Optical Interconnection
Exhibit E-2: Summary of Chip-Level Optical Interconnect Shipments: Revenue Generation by Product ($Millions)
Exhibit E-3: Summary of Chip-Level Optical Interconnect Shipments: Revenue Generation by Location ($Millions)
Exhibit 2-1: Selected Megatrends Impacting Optical Interconnect
Exhibit 2-2: Impact of Demand Side Trends on the Need for Optical Interconnect
Exhibit 2-3: Strategies for Avoiding the Interconnect Bottleneck
Exhibit 2-4: Advantages and Disadvantages for Optical Interconnection for Chip-Level Environments
Exhibit 3-1: Chip-Level Optical Interconnection Paradigms
Exhibit 3-2: Chip-Level Laser Paradigms
Exhibit 3-3: Diagram of a Simple VCSEL Structure
Exhibit 3-4: VCSEL Data Rate Evolution
Exhibit 3-5: Selected Optical Engine Firms and Products
Exhibit 3-6: Eight-Year Forecasts of Chip-Level Optical Interconnect Shipments Using Optical Engines: Revenue Generation ($Millions)
Exhibit 3-7: Opportunities for Optical Integration in High-Speed Networks
Exhibit 3-8: Eight-Year Forecast of Chip-Level Optical Interconnect Shipments Using PICs: Revenue Generation ($Millions)
Exhibit 3-9: Eight-Year Forecast of Chip-Level Optical Interconnect Shipments Using Active Silicon Photonics: Revenue Generation ($Millions)
Exhibit 3-10: Chip-Level Optical Interconnection Paradigms
Exhibit 3-11: Eight-Year Forecast of Chip-Level Optical Interconnect Shipments Using Fiber, Waveguides and Free-Space Optics ($Millions)

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